Semiconductor fabrication technology generally requires high integration and high performance. Manufacturing techniques for reducing MOSFET gate line widths and device isolation structures are most closely related to the high integration of a semiconductor device. To improve device integration, much effort has been devoted toward improving isolation techniques.
Conventional techniques for forming device isolation structures include the recessed-local oxidation of silicon (R-LOCOS) method and the shallow trench isolation (STI) method. In particular, high voltage semiconductor devices generally have a field oxide layer or STI layer in order to increase breakdown voltages.
The STI process is generally more efficient than the process of forming a field oxide layer (e.g., using the R-LOCOS method). Consequently, the STI method tends to be more widely used.
The presence of an STI layer in a channel helps to improve breakdown voltage characteristics, but causes an excessive electric field to be formed near an edge of the STI layer upon the movement of electrons in the channel. This leads to the generation of a large amount of hot carriers, resulting in undesirable hot carrier injection (HCI) characteristics. The HCI characteristics are a very important index that is generally used to judge the reliability of a semiconductor device. Therefore, it is important to improve the HCI characteristics in the development of devices.
FIG. 1 shows a typical current flow observed around a STI layer in a semiconductor device. As can be seen from FIG. 1, the current is concentrated near the bottom edge of the STI layer adjacent to a channel formed in a semiconductor substrate.